There will be three alternative pre-conference tutorials on Monday afternoon prior to the conference.

Time and location:

October 30, at 13:00-17:00

Location: t.b.d.

Tutorial Abstracts

1) Design of Integrated Power Amplifiers for Mobile Communication Systems

This comprehensive tutorial will guide you through the essentials of designing integrated power amplifiers for mobile communication systems. It aims to equip you with a fundamental understanding of the design principles, architecture, and the relevant RF (Radio Frequency) techniques necessary for the efficient and effective development of power amplifiers.

By the end of the tutorial, participants should be able to:

  • Understand the basic principles of power amplifier operation and the need for power amplifiers in mobile communication systems.
  • Grasp the importance of efficiency and linearity in power amplifiers.
  • Comprehend the structure and design of various types of power amplifiers such as Class A, Class B, Class AB, Class C, Class D, and Class E.
  • Learn about RF design principles and the challenges associated with the design of RF circuits.
  • Know the various stages involved in the design of integrated power amplifiers and the tools used in the design process.
  • Understand the testing and validation process of power amplifiers.

2) Network on Chip (NoC)-based Deep Neural Network Design Framework: From Algorithms to Architectures

Deep Neural Networks (DNN) have shown significant advantages in many domains such as image processing, speech recognition, and machine translation. Current DNNs include many layers and thousands of parameters, leading to the high design complexity and power consumption when developing large-scale deep neural network accelerators. In addition, contemporary DNNs are usually trained based on tons of labeled data. Therefore, it is time-consuming to generate an optimal DNN when facing a new dataset.
To reduce the design challenge of generating a cost-efficient neural network model, Network-on-Chip-based (NoC-based) DNN has become an emerging design paradigm because the NoC interconnection can help to reduce the off-chip memory accesses while offering better scalability and flexibility. However, some communication issues between neuron processing elements need to be considered. This tutorial aims to introduce this new kind of DNN design paradigm from algorithm level to architecture level. The ultimate goal is to let the audients understand the fundamental design concepts of a NoC-based DNN hardware platform. The topics covered in this tutorial are
• Fundamental of DNN accelerator design: opportunities and challenges (1 hour)
• NoC-based DNN design: algorithms and architectures (1.5 hours)
• Tutorial of a NoC-based DNN Simulator: DNNoxim (0.5 hours)

3) Advanced Topics in 5G Networks Across Industry and Cross border Corridors

As public and private 5G networks continue to be deployed providing opportunities for industries and society as a whole, it is essential to keep abreast with its latest technological
advancements and expanding applications. This tutorial provides an overview of cutting edge topics in 5 G networks. Participants will gain an up to date understanding of a) selected technologies (network slicing with application in cross border V2X environments, AI based cybersecurity in the industry including machine learning and federated learning), as well as  b) 5G non public networks NPN) and their deployment scenarios and advantages, 5G for Connected Automated Mobility (CAM) a cross borders , and an example of CAM platform including management and orchestration, and multi administrative domain scenarios in NFV/ZSM.


There is a separate fee for the tutorial attendance: 130 / 100 EUR.