Ultra-Low Power ICs for IoT devices and sensor nodes
Abstract
Enabling the Internet of Things requires energy autonomous systems for distributed sensing and data acquisition. The low-cost requirement demands small area, low design effort, digital-like shrinkage across CMOS generations and design/technology portability. A fully synthesizable Integrated Circuits (ICs) design approach meets all these requirements but is traditionally suitable for digital ICs only.
The possibility to exploit the digital (automated) design flow even for analog building blocks can dramatically reduce the design effort of any system-on-chip that face with analog signal. Since data processing is digital but most signals from the real-world are analog, almost any electronics device that interface with the surrounding environment will benefit from the outcomes of this investigation.
This approach leads to IC designs which are natively portable across technology nodes (e.g. from 40nm to 28nm) and highly reconfigurable, thus enabling dynamic energy-quality scaling, which is critical in tightly energy constrained IoT application scenarios, as well as a low design effort and a fast time-to-market.
About the speaker
ORAZIO AIELLO (S’06–M’15) holds degrees from University of Catania, Italy (B.Sc., 2005, cum laude; M.Sc., 2008, cum laude), from Scuola Superiore di Catania, Italy (M.Sc., 2009, cum laude) and from Politecnico di Torino, Italy (Ph.D., 2013). In 2008-2009, he worked at the EMC Competence Center of the Istituto Superiore Mario Boella (Turin, Italy). In 2012, he was Visiting PhD Student at Monash University, Melbourne, Australia. In 2013 he was part of a joint project with FIAT-Chrysler Automobiles, in 2014 he joined NXP Semiconductors as Mixed Signal IC Designer and EMC expert. In 2015-2016 he was Visiting Fellow at the University of Sydney and University of New South Wales, Sydney, Australia. Since 2015 he has collaborated with the Green IC group at National University of Singapore where he is now a Marie Skłodowska-Curie Individual and Global Fellow (MSCA-IF-GF). His main research interests include the design for reliability of System Basis Chip front-ends in harsh environments, energy-efficient circuit design and mostly-digital sensor interfaces. He is currently leading the ULPIoT project, funded by the European Commission.